zgb40302 2018-05-29 01:25 采纳率: 0%
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gdb 进入汇编模式 ,发现ss 和 cs中的值一直不变

(gdb) i r
rax 0x4005ed 4195821
rbx 0x0 0
rcx 0x40 64
rdx 0x7fffffffe2a8 140737488347816
rsi 0x7fffffffe298 140737488347800
rdi 0x1 1
rbp 0x7fffffffe1b0 0x7fffffffe1b0
rsp 0x7fffffffe180 0x7fffffffe180
r8 0x7ffff75b7e80 140737343356544
r9 0x0 0
r10 0x7fffffffe000 140737488347136
r11 0x7ffff721da40 140737339578944
r12 0x4004c0 4195520
r13 0x7fffffffe290 140737488347792
r14 0x0 0
r15 0x0 0
rip 0x400611 0x400611
eflags 0x202 [ IF ]
cs 0x33 51
ss 0x2b 43
ds 0x0 0
es 0x0 0
fs 0x0 0
gs 0x0 0

那位知道ss 与 cs 中的43和51是什么吗?在我的机子上写了4个C++语言的小程序,都是这个值? ss 与 rsp 有啥区别?

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1条回答 默认 最新

  • wf20111017 2019-03-09 11:31
    关注

    参考[Intel Vol1]原文:
    3.4.2.1 Segment Registers in 64-Bit Mode
    In 64-bit mode: CS, DS, ES, SS are treated as if each segment base is 0, regardless of the value of the associated
    segment descriptor base. This creates a flat address space for code, data, and stack. FS and GS are exceptions.
    Both segment registers may be used as additional base registers in linear address calculations (in the addressing
    of local data and certain operating system data structures).
    Even though segmentation is generally disabled, segment register loads may cause the processor to perform
    segment access assists. During these activities, enabled processors will still perform most of the legacy checks on
    loaded values (even if the checks are not applicable in 64-bit mode). Such checks are needed because a segment
    register loaded in 64-bit mode may be used by an application running in compatibility mode.
    Limit checks for CS, DS, ES, SS, FS, and GS are disabled in 64-bit mode.

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