在运行的时候遇见了这样得问题，主要是Library cyclone10lp not found.不知道该怎么解决，有没有大佬舅舅孩子
```java
Determining the location of the ModelSim executable...
Using: D:\text\modelsim_ase\win32aloem
To specify a ModelSim executable directory, select: Tools -> Options -> EDA Tool Options
Note: if both ModelSim-Altera and ModelSim executables are available, ModelSim-Altera will be used.
**** Generating the ModelSim Testbench ****
quartus_eda --gen_testbench --tool=modelsim_oem --format=vhdl --write_settings_files=off signt -c signt --vector_source="D:/text/signt/Waveform.vwf" --testbench_file="D:/text/signt/simulation/qsim/Waveform.vwf.vht"
Info: *******************************************************************
Info: Running Quartus Prime EDA Netlist Writer
Info: Version 19.1.0 Build 670 09/22/2019 SJ Lite Edition
Info: Copyright (C) 2019 Intel Corporation. All rights reserved.
Info: Your use of Intel Corporation's design tools, logic functions
Info: and other software and tools, and any partner logic
Info: functions, and any output files from any of the foregoing
Info: (including device programming or simulation files), and any
Info: associated documentation or information are expressly subject
Info: to the terms and conditions of the Intel Program License
Info: Subscription Agreement, the Intel Quartus Prime License Agreement,
Info: the Intel FPGA IP License Agreement, or other applicable license
Info: agreement, including, without limitation, that your use is for
Info: the sole purpose of programming logic devices manufactured by
Info: Intel and sold by Intel or its authorized distributors. Please
Info: refer to the applicable agreement for further details, at
Info: https://fpgasoftware.intel.com/eula.
Info: Processing started: Tue Oct 26 15:36:37 2021
Info: Command: quartus_eda --gen_testbench --tool=modelsim_oem --format=vhdl --write_settings_files=off signt -c signt --vector_source=D:/text/signt/Waveform.vwf --testbench_file=D:/text/signt/simulation/qsim/Waveform.vwf.vht
Warning (18236): Number of processors has not been specified which may cause overloading on shared machines. Set the global assignment NUM_PARALLEL_PROCESSORS in your QSF to an appropriate value for best performance.
Completed successfully.
**** Generating the functional simulation netlist ****
quartus_eda --write_settings_files=off --simulation --functional=on --flatten_buses=off --tool=modelsim_oem --format=vhdl --output_directory="D:/text/signt/simulation/qsim/" signt -c signt
Info: *******************************************************************
Info: Running Quartus Prime EDA Netlist Writer
Info: Version 19.1.0 Build 670 09/22/2019 SJ Lite Edition
Info: Copyright (C) 2019 Intel Corporation. All rights reserved.
Info: Your use of Intel Corporation's design tools, logic functions
Info: and other software and tools, and any partner logic
Info: functions, and any output files from any of the foregoing
Info: (including device programming or simulation files), and any
Info: associated documentation or information are expressly subject
Info: to the terms and conditions of the Intel Program License
Info: Subscription Agreement, the Intel Quartus Prime License Agreement,
Info: the Intel FPGA IP License Agreement, or other applicable license
Info: agreement, including, without limitation, that your use is for
Info: the sole purpose of programming logic devices manufactured by
Info: Intel and sold by Intel or its authorized distributors. Please
Info: refer to the applicable agreement for further details, at
Info: https://fpgasoftware.intel.com/eula.
Info: Processing started: Tue Oct 26 15:36:38 2021
Info: Command: quartus_eda --write_settings_files=off --simulation=on --functional=on --flatten_buses=off --tool=modelsim_oem --format=vhdl --output_directory=D:/text/signt/simulation/qsim/ signt -c signt
Warning (18236): Number of processors has not been specified which may cause overloading on shared machines. Set the global assignment NUM_PARALLEL_PROCESSORS in your QSF to an appropriate value for best performance.
Info (204019): Generated file signt.vho in folder "D:/text/signt/simulation/qsim//" for EDA simulation tool
Info: Quartus Prime EDA Netlist Writer was successful. 0 errors, 1 warning
Info: Peak virtual memory: 4643 megabytes
Info: Processing ended: Tue Oct 26 15:36:39 2021
Info: Elapsed time: 00:00:01
Info: Total CPU time (on all processors): 00:00:01
Completed successfully.
**** Generating the ModelSim .do script ****
D:/text/signt/simulation/qsim/signt.do generated.
Completed successfully.
**** Running the ModelSim simulation ****
D:/text/modelsim_ase/win32aloem/vsim -c -do signt.do
Reading D:/text/modelsim_ase/tcl/vsim/pref.tcl
# 10.3d
# do signt.do
# ** Warning: (vlib-34) Library already exists at "work".
#
# Model Technology ModelSim ALTERA vcom 10.3d Compiler 2014.10 Oct 7 2014
# Start time: 15:36:40 on Oct 26,2021
# vcom -work work signt.vho
# -- Loading package STANDARD
# ** Error: signt.vho(31): Library cyclone10lp not found.
# -- Loading package TEXTIO
# -- Loading package std_logic_1164
# -- Loading package VITAL_Timing
# -- Loading package VITAL_Primitives
# -- Loading package dffeas_pack
# -- Loading package altera_primitives_components
# ** Error: signt.vho(34): (vcom-1136) Unknown identifier "CYCLONE10LP".
#
# ** Error: signt.vho(37): VHDL Compiler exiting
# End time: 15:36:40 on Oct 26,2021, Elapsed time: 0:00:00
# Errors: 3, Warnings: 0
# ** Error: D:/text/modelsim_ase/win32aloem/vcom failed.
# Executing ONERROR command at macro ./signt.do line 3
Error.
```
