应课业要求，需要小组做一个项目，内容是在MSP430G2553开发板上使用Alpha rf TRX433S进行通讯。因为是一个很少见的通讯模块，并且在MSP430上使用，所以在网上基本找不到例子也找不到库，希望有好心的大师能帮忙看看是不是代码或者接线有问题。另外如果有大师希望有偿帮助我们解决问题，那么我们也很乐意，价格可聊。
现在的情况基本就是用CCS烧录两块板子后，板子一点反应都没有。用逻辑分析仪分析SDO的信号也只能得到一个很奇怪的信号。
这是发送端的代码
#include<msp430.h>
#include<stdint.h>
/*
* main.c
*
// MSP430G2xx3
// -----------------
// /|\| XIN|-
// | | |
// --|RST XOUT|-
// | |
// | P1.7|-> Data Out (UCB0SIMO)
// | |
// LED <-|P1.0 P1.6|<- Data In (UCB0SOMI)
// | |
// | P1.5|-> Serial Clock Out (UCB0CLK)
*
*/
//unsigned char address;
//unsigned char data;
void init(void);
void initRFM(void);
void write(unsigned char address, const unsigned char *buffer, unsigned int count);
void txRFM(void);
/* part of main */
int main(void)
{
WDTCTL = WDTPW | WDTHOLD; // Stop watchdog timer
int t;
for (t = 0; t < 150; t++)
{ // 150 ms now
__delay_cycles(1000); // 1000 usec
}
init();
//initTRX();
while (1)
{
txTRX();
P1OUT &= BIT0;
}
return 0;
}
/* Part of TRX */
void txTRX(void)
{
/*
set configuration setting
// Enable TX register, disnable RX FIFO buffer,
433Mhz and select crystal load capacitor 8.5 pF
1000 0000 1001 0000
*/
write(0x00,0x04,8);
write(0x55, 0x55, 8);
/*
set power management
RCV_Disabled,BAND_Enabled,TRM_Enabled,SYNTH_ENABLED,COSC_ENABLED
1000 0010 0111 1101
*/
write(0x82,0x7D,8);//open TX
/*
set FIFO reset mode
FIFO reset 8 interrupt level, Synchron Pattern 2DD4h,
Always ,enable FIFO fill, disable hi sensitivity rest mode
1100 1010 1000 0011
*/
write(0xCA,0x83,8);
__delay_cycles(50);
//transmitter register write command :1011 1000 0001 0001,data = 17
write(0xB8,0x11,8); // send payload to the FIFO
write(0x82,0x5D,8); // CLOSE TX
}
void write(unsigned char address, const unsigned char *buffer, unsigned int count)
{
register volatile unsigned char i; // Buffer iterator
// Change MISO pin to SPI.
P1SEL |= BIT6;
P1SEL2 |= BIT6;
P2DIR &= ~BIT7;
// Look for CHIP_RDYn from radio.
while (P1IN & BIT6);
// Write the address/command byte.
UCB0TXBUF = address;
// Write data byte(s).
for (i = 0; i < count; i++)
{
while (!(IFG2 & UCB0TXIFG));
UCB0TXBUF = *(buffer+i);
}
// Wait for operation to complete.
while(UCB0STAT & UCBUSY);
P2OUT |= BIT7;
// Change MISO pin to general purpose output (LED use if available).
P1SEL &= ~BIT6;
P1SEL2 &= ~BIT6;
}
void init(void) {
UCB0CTL1 = UCSWRST;
UCB0CTL0 = UCSYNC + UCSPB + UCMSB + UCCKPH; //UCMSB + UCMST + UCSYNC; // 3-pin, 8-bit SPI master
UCB0CTL1 |= UCSSEL_2; // SMCLK
UCB0BR0 = 0x02; // Frequency CPU / 2 (16Mhz / 2 = 8 Mhz SPI)
UCB0BR1 = 0;
// Setup SCLK, MISO, and MOSI lines.
P1SEL |= BIT5 | BIT6 | BIT7;
P1SEL2 |= BIT5 | BIT6 | BIT7;
P1DIR |= BIT5 | BIT7;
P1DIR &= ~BIT6;
// Setup CSn line.
P2DIR |= BIT7;
P2OUT |= BIT7;
P2SEL &= ~BIT7;
P2SEL2 &= ~BIT7;
//P1DIR &= ~(INT1 | INT2); // P1.4 and P1.3 as INT (INTERRUPT, not used yet)
UCB0CTL1 &= ~UCSWRST; // Initialize USCI state machine
}
void initTRX(void)
{
/* Configuration Setting Command
Enable TX register, enable RX FIFO buffer, 433Mhz and select crystal load capacitor 8.5 pF*/
write(0x80,0xD0,8);
/* power management command
enable receiver, base band block,synthesizer,crystal oscillator,low battery detector,wake-up timer
disable clock output of CLK pin */
write(0x82,0xFF,8);
/* FIFO and Reset Mode Command
FIFO reset 8 interrupt level, Byte1 2Dh Synchron Pattern 2DD4h,
sync-word,enable FIFO fill, disable hi sensitivity rest mode
1100 1010 1000 0011
*/
write(0xCA,0x07,8);
/*set frequency
433 Mhz:1010 0100 1011 0000
*/
write(0xA4,0xB0,8);
/*set datarate
1100 0110 cs r6-r0
*/
write(0xC6,0x00,8);
/*set RCV Contral
1001 0110 010 11 001
VDI output, Baseband Bandwidth[340kHz], VDI response time slow
LNA gain -20dBm,DRSSI thrsshold:-97dBM
*/
write(0x96,0x59,8);
/*set datafilter
1100 0010 1010 1000
Enable clock recovery auto-lock,Enable clock recovery fast mode,Digital filter,DQD theshold:000
*/
write(0xC2,0xA8,8);
/*set AFC
1100 0100 1111 1111
independently for VID ,range limit:+3/-4,st goes hi will store offset into output register
enable AFC hi accuracy mode, enable AFC output register,Enable AFC funcition
*/
write(0xC4,0xFF,8);
/*set TX control configuration
1001 1000 0000 0000
*/
write(0x98,0x00,8);
/*set PLL
uC CLK frequency est 3.3MHz, crystal start-up time 1ms, power consumption 620uA,
phase detector delay enable,disables the dithering in the PLL loop, Max bit rate 256 kbps
1100 1100 0010 1111
*/
write(0xCC,0x2F,8);
/*set Wakeup-timer
1024ms
111 01010 0000 0000
*/
write(0xEA,0x00,8);
/*set dutycycle*/
/*set LowBatteryDetectorAndClkDivider*/
/*alpha rf readstatus*/
}
这是接收端的代码
#include<msp430.h>
#include "stdint.h"
/*
* main.c
*
// MSP430G2xx3
// -----------------
// /|\| XIN|-
// | | |
// --|RST XOUT|-
// | |
// | P1.7|-> Data Out (UCB0SIMO)
// | |
// LED <-|P1.0 P1.6|<- Data In (UCB0SOMI)
// | |
// | P1.5|-> Serial Clock Out (UCB0CLK)
*
*/
// unsigned int address;
// unsigned char data;
void init(void);
void initTRX(void);
void write(unsigned char address, const unsigned char *buffer, unsigned int count);
void rcvTRX(void);
unsigned char dataRCV;
int main(void)
{
WDTCTL = WDTPW | WDTHOLD; // Stop watchdog timer
int t;
for (t = 0; t < 150; t++)
{ // 150 ms now
__delay_cycles(1000); // 1000 usec
}
init();
initTRX();
while (1)
{
rcvTRX();
if(dataRCV == 0x11){
P1DIR |= BIT0;
P1OUT |= BIT0;
}
}
}
void rcvTRX(void)
{
/*
set configuration setting
// disable TX register, ennable RX FIFO buffer,
433Mhz and select crystal load capacitor 8.5 pF
1000 0000 0101 0000
*/
write(0x80,0x50,8);
/*
set power management
RCV_enabled,BAND_Enabled,TRM_disabled,SYNTH_ENABLED,COSC_ENABLED
1000 0010 1101 1101
*/
write(0x82,0xDD,8);//open RCV close Tx
write(0xCA,0x83,8);
__delay_cycles(50);
//read data from FIFO
write(0xB0,0x00,8); // Receiver FIFO read command:1011 0000 0000 0000
SPIRead(); // data = 00|DATA
//reset fifo
write(0x82,0x5D,8); // CLOSE RCV
}
void SPIRead(void){
unsigned char Data;
while (!(IFG2 & UCB0RXIFG)); // USCI_B0 RX buffer ready?
dataRCV = UCB0RXBUF;
}
void write(unsigned char address, const unsigned char *buffer, unsigned int count)
{
register volatile unsigned char i; // Buffer iterator
// Change MISO pin to SPI.
P1SEL |= BIT6;
P1SEL2 |= BIT6;
P2DIR &= ~BIT7;
// Look for CHIP_RDYn from radio.
while (P1IN & BIT6);
// Write the address/command byte.
UCB0TXBUF = address;
// Write data byte(s).
for (i = 0; i < count; i++)
{
while (!(IFG2 & UCB0TXIFG));
UCB0TXBUF = *(buffer+i);
}
// Wait for operation to complete.
while(UCB0STAT & UCBUSY);
P2OUT |= BIT7;
// Change MISO pin to general purpose output (LED use if available).
P1SEL &= ~BIT6;
P1SEL2 &= ~BIT6;
}
void init(void) {
UCB0CTL1 = UCSWRST;
UCB0CTL0 = UCSYNC + UCSPB + UCMSB + UCCKPH; //UCMSB + UCMST + UCSYNC; // 3-pin, 8-bit SPI master
UCB0CTL1 |= UCSSEL_2; // SMCLK
UCB0BR0 = 0x02; // Frequency CPU / 2 (16Mhz / 2 = 8 Mhz SPI)
UCB0BR1 = 0;
// Setup SCLK, MISO, and MOSI lines.
P1SEL |= BIT5 | BIT6 | BIT7;
P1SEL2 |= BIT5 | BIT6 | BIT7;
P1DIR |= BIT5 | BIT7;
P1DIR &= ~BIT6;
// Setup CSn line.
P2DIR |= BIT7;
P2OUT |= BIT7;
P2SEL &= ~BIT7;
P2SEL2 &= ~BIT7;
//P1DIR &= ~(INT1 | INT2); // P1.4 and P1.3 as INT (INTERRUPT, not used yet)
UCB0CTL1 &= ~UCSWRST; // Initialize USCI state machine
}
void initTRX(void)
{
/* Configuration Setting Command
Enable TX register, enable RX FIFO buffer, 433Mhz and select crystal load capacitor 8.5 pF*/
write(0x80,0xD0,8);
/* power management command
enable receiver, base band block,synthesizer,crystal oscillator,low battery detector,wake-up timer
disable clock output of CLK pin */
write(0x82,0xFF,8);
/* FIFO and Reset Mode Command
FIFO reset 8 interrupt level, Byte1 2Dh Synchron Pattern 2DD4h,
sync-word,enable FIFO fill, disable hi sensitivity rest mode
1100 1010 1000 0011
*/
write(0xCA,0x07,8);
/*set frequency
433 Mhz:1010 0100 1011 0000
*/
write(0xA4,0xB0,8);
/*set datarate
1100 0110 cs r6-r0
*/
write(0xC6,0x00,8);
/*set RCV Contral
1001 0110 010 11 001
VDI output, Baseband Bandwidth[340kHz], VDI response time slow
LNA gain -20dBm,DRSSI thrsshold:-97dBM
*/
write(0x96,0x59,8);
/*set datafilter
1100 0010 1010 1000
Enable clock recovery auto-lock,Enable clock recovery fast mode,Digital filter,DQD theshold:000
*/
write(0xC2,0xA8,8);
/*set AFC
1100 0100 1111 1111
independently for VID ,range limit:+3/-4,st goes hi will store offset into output register
enable AFC hi accuracy mode, enable AFC output register,Enable AFC funcition
*/
write(0xC4,0xFF,8);
/*set TX control configuration
1001 1000 0000 0000
*/
write(0x98,0x00,8);
/*set PLL
Not set
*/
/*set Wakeup-timer
1024ms
111 01010 0000 0000
*/
write(0xEA,0x00,8);
/*set dutycycle*/
/*set LowBatteryDetectorAndClkDivider*/
/*alpha rf readstatus*/
}
以下是收发器的数据手册
https://docs.rs-online.com/4540/0900766b80d715d1.pdf
CCS烧录后用两块MSP430接收发器通讯但是没有任何反应。接线方面只接了SCK, SDI ,SDO
我尝试过将spi发送的函数改成直接发送16bits的信息，但依旧没有作用。
希望有能帮我看看是否代码有问题，或者有人愿意帮我们完成这个功能我们也可以适当付费。
研究了一周还是没有进展，实在太折磨人了。
