
在Quartus上总是编译不通过,有好多处错误,这是为什么呢?
module Daojishi(clk,ELED1,ELED2,NLED1,NLED2);
input clk;
output ELED1;
output ELED2;
output NLED1;
output NLED2;
reg[5:0] a;
reg[4:0] E;
reg[4:0] N;
a<=6'b000000;
E<=5'b10100;
N<=5'b11001;
always @(posedge clk) begin
if(a==6'110010) a<=6'b000001;
else a<=a+6'b000001;
if(a<6'b010100) begin
E<=E-1;N<=N-1;
end
if(a==6'b010100) begin
E<=5;N<=N-1;
end
if(a>6'b010100&&a<6'b011001) begin
E<=E-1;N<=N-1;
end
if(a==6'b011001) begin
E<=25;N<=20;
end
if(a>5'b11001&&a<6'b101101) begin
E<=E-1;N<=N-1;
end
if(a==6'b101101) begin
E<=E-1;N<=5;
end
if(a>6'b101101&&a<6'110010) begin
E<=E-1;N<=N-1;
end
if(a==6'110010) begin
E<=20;N<=25;
end
end
always @(E)
case(E)
5'b00000:ELED1<=4'b0000; ELED2<=4'b0000;
5'b00001:ELED1<=4'b0001; ELED2<=4'b0000;
5'b00010:ELED1<=4'b0010; ELED2<=4'b0000;
5'b00011:ELED1<=4'b0011; ELED2<=4'b0000;
5'b00100:ELED1<=4'b0100; ELED2<=4'b0000;
5'b00101:ELED1<=4'b0101; ELED2<=4'b0000;
5'b00110:ELED1<=4'b0110; ELED2<=4'b0000;
5'b00111:ELED1<=4'b0111; ELED2<=4'b0000;
5'b01000:ELED1<=4'b1000; ELED2<=4'b0000;
5'b01001:ELED1<=4'b1001; ELED2<=4'b0000;
5'b01010:ELED1<=4'b0000; ELED2<=4'b0001;
5'b01011:ELED1<=4'b0001; ELED2<=4'b0001;
5'b01100:ELED1<=4'b0010; ELED2<=4'b0001;
5'b01101:ELED1<=4'b0011; ELED2<=4'b0001;
5'b01110:ELED1<=4'b0100; ELED2<=4'b0001;
5'b01111:ELED1<=4'b0101; ELED2<=4'b0001;
5'b10000:ELED1<=4'b0110; ELED2<=4'b0001;
5'b10001:ELED1<=4'b0111; ELED2<=4'b0001;
5'b10010:ELED1<=4'b1000; ELED2<=4'b0001;
5'b10011:ELED1<=4'b1001; ELED2<=4'b0001;
5'b10100:ELED1<=4'b0000; ELED2<=4'b0010;
5'b10101:ELED1<=4'b0001; ELED2<=4'b0010;
5'b10110:ELED1<=4'b0010; ELED2<=4'b0010;
5'b10111:ELED1<=4'b0011; ELED2<=4'b0010;
5'b11000:ELED1<=4'b0100; ELED2<=4'b0010;
5'b11001:ELED1<=4'b0101; ELED2<=4'b0010;
endcase
always @(N)
case(N)
5'b00000:NLED1<=4'b0000; NLED2<=4'b0000;
5'b00001:NLED1<=4'b0001; NLED2<=4'b0000;
5'b00010:NLED1<=4'b0010; NLED2<=4'b0000;
5'b00011:NLED1<=4'b0011; NLED2<=4'b0000;
5'b00100:NLED1<=4'b0100; NLED2<=4'b0000;
5'b00101:NLED1<=4'b0101; NLED2<=4'b0000;
5'b00110:NLED1<=4'b0110; NLED2<=4'b0000;
5'b00111:NLED1<=4'b0111; NLED2<=4'b0000;
5'b01000:NLED1<=4'b1000; NLED2<=4'b0000;
5'b01001:NLED1<=4'b1001; NLED2<=4'b0000;
5'b01010:NLED1<=4'b0000; NLED2<=4'b0001;
5'b01011:NLED1<=4'b0001; NLED2<=4'b0001;
5'b01100:NLED1<=4'b0010; NLED2<=4'b0001;
5'b01101:NLED1<=4'b0011; NLED2<=4'b0001;
5'b01110:NLED1<=4'b0100; NLED2<=4'b0001;
5'b01111:NLED1<=4'b0101; NLED2<=4'b0001;
5'b10000:NLED1<=4'b0110; NLED2<=4'b0001;
5'b10001:NLED1<=4'b0111; NLED2<=4'b0001;
5'b10010:NLED1<=4'b1000; NLED2<=4'b0001;
5'b10011:NLED1<=4'b1001; NLED2<=4'b0001;
5'b10100:NLED1<=4'b0000; NLED2<=4'b0010;
5'b10101:NLED1<=4'b0001; NLED2<=4'b0010;
5'b10110:NLED1<=4'b0010; NLED2<=4'b0010;
5'b10111:NLED1<=4'b0011; NLED2<=4'b0010;
5'b11000:NLED1<=4'b0100; NLED2<=4'b0010;
5'b11001:NLED1<=4'b0101; NLED2<=4'b0010;
endcase
endmodule
