全村的希望7 2022-03-02 18:17
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quartussii18.1 current license file does not contain a valid license for encrypted file

quartusii18.1编译出现问题,查阅资料可能是破解IP不支持的问题。就是nco这个IP中被加密了,即使我在license.dat中添加了nco的IP也会出现这个问题。

Error (10003): Can't open encrypted VHDL or Verilog HDL file "D:/0_FPGA/0_phasemeter_18.1/prj/ipcore/nco_ip/nco_ip/synthesis/submodules/sid_2c_1p.v" -- current license file does not contain a valid license for encrypted file
Error (10003): Can't open encrypted VHDL or Verilog HDL file "D:/0_FPGA/0_phasemeter_18.1/prj/ipcore/nco_ip/nco_ip/synthesis/submodules/asj_nco_mob_rw.v" -- current license file does not contain a valid license for encrypted file
Error (10003): Can't open encrypted VHDL or Verilog HDL file "D:/0_FPGA/0_phasemeter_18.1/prj/ipcore/nco_ip/nco_ip/synthesis/submodules/asj_gar.v" -- current license file does not contain a valid license for encrypted file
Error (10003): Can't open encrypted VHDL or Verilog HDL file "D:/0_FPGA/0_phasemeter_18.1/prj/ipcore/nco_ip/nco_ip/synthesis/submodules/asj_nco_isdr.v" -- current license file does not contain a valid license for encrypted file
Error (10003): Can't open encrypted VHDL or Verilog HDL file "D:/0_FPGA/0_phasemeter_18.1/prj/ipcore/nco_ip/nco_ip/synthesis/submodules/asj_nco_apr_dxx.v" -- current license file does not contain a valid license for encrypted file
Error (10003): Can't open encrypted VHDL or Verilog HDL file "D:/0_FPGA/0_phasemeter_18.1/prj/ipcore/nco_ip/nco_ip/synthesis/submodules/segment_arr_tdl.v" -- current license file does not contain a valid license for encrypted file
Error (10003): Can't open encrypted VHDL or Verilog HDL file "D:/0_FPGA/0_phasemeter_18.1/prj/ipcore/nco_ip/nco_ip/synthesis/submodules/segment_sel.v" -- current license file does not contain a valid license for encrypted file
Error (10003): Can't open encrypted VHDL or Verilog HDL file "D:/0_FPGA/0_phasemeter_18.1/prj/ipcore/nco_ip/nco_ip/synthesis/submodules/asj_dxx_g.v" -- current license file does not contain a valid license for encrypted file
Error (10003): Can't open encrypted VHDL or Verilog HDL file "D:/0_FPGA/0_phasemeter_18.1/prj/ipcore/nco_ip/nco_ip/synthesis/submodules/asj_dxx.v" -- current license file does not contain a valid license for encrypted file
Error (10003): Can't open encrypted VHDL or Verilog HDL file "D:/0_FPGA/0_phasemeter_18.1/prj/ipcore/nco_ip/nco_ip/synthesis/submodules/asj_xnqg.v" -- current license file does not contain a valid license for encrypted file
Error (10003): Can't open encrypted VHDL or Verilog HDL file "D:/0_FPGA/0_phasemeter_18.1/prj/ipcore/nco_ip/nco_ip/synthesis/submodules/asj_nco_as_m_cen.v" -- current license file does not contain a valid license for encrypted file
Error (10003): Can't open encrypted VHDL or Verilog HDL file "D:/0_FPGA/0_phasemeter_18.1/prj/ipcore/nco_ip/nco_ip/synthesis/submodules/asj_altqmcpipe.v" -- current license file does not contain a valid license for encrypted file
Error: Quartus Prime Analysis & Synthesis was unsuccessful. 12 errors, 25 warnings
Error: Peak virtual memory: 5541 megabytes
Error: Processing ended: Wed Mar 02 18:13:02 2022
Error: Elapsed time: 00:00:13
Error: Total CPU time (on all processors): 00:00:25
Error (293001): Quartus Prime Full Compilation was unsuccessful. 14 errors, 25 warnings

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    • 系统已结题 3月10日
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