rv修改引脚输出时钟频率

Question

问题：rv如何通过设备树修改引脚输出频率

背景： rv外接adv7393数字转模拟视频输出芯片，时钟频率需要27M

设备树内容修改如下

#include <dt-bindings/display/media-bus-format.h>

&i2c2 {
    pinctrl-names = "default";
    pinctrl-0 = <&i2c2m0_xfer>;
    clock-frequency = <400000>;
    status = "okay";

    sii9022: sii9022@2a {
        compatible = "rockchip,adv7393";
        reg = <0x2a>;
        // pinctrl-names = "default";
        // pinctrl-0 = <&bt656_pins>;
        bus-format = <MEDIA_BUS_FMT_UYVY8_2X8>;
        #clock-cells = <0>;

        clocks = <&cru ACLK_VOP>, <&cru DCLK_VOP>, <&cru HCLK_VOP>;
        clock-names = "aclk_vop", "dclk_vop", "hclk_vop";

        clock-frequency = <270000000>; //
        clock-output-names = "adv_27M";
        ports {
            #address-cells = <1>;
            #size-cells = <0>;

            port@0 {
                reg = <0>;

                sii9022_in_rgb: endpoint {
                    remote-endpoint = <&rgb_out_sii9022>;
                };
            };
        };
    };
};


&rgb {
    status = "okay";
    pinctrl-names = "default";
    pinctrl-0 = <&bt656_pins>;

    #clock-cells = <0>;

    clocks = <&cru ACLK_VOP>, <&cru DCLK_VOP>, <&cru HCLK_VOP>;
    clock-names = "aclk_vop", "dclk_vop", "hclk_vop";

    clock-frequency = <270000000>; //
    clock-output-names = "adv_27M";


    ports {
        port@1 {
            reg = <1>;
            #address-cells = <1>;
            #size-cells = <0>;

            rgb_out_sii9022: endpoint@0 {
                reg = <0>;
                remote-endpoint = <&sii9022_in_rgb>;
            };
        };
    };
};

&rgb_in_vop {
    status = "okay";
};

&vop {
    status = "okay";
};

我的解答思路和尝试过的方法：通过修改设备树,编译驱动文件，i2c和设备正常通信能读写寄存器，通过pinctrl复用引脚功能为VO_LCDC_D[0,7],但是VO_LCDC_CLK引脚通过示波器测量，频率一直无法降到27M，原理图如下

望不吝赐教

Answer 1

MurrayShen 下午好🌅🌅🌅
本答案参考ChatGPT-3.5

根据提供的设备树内容，你想要修改引脚输出时钟频率为27M。下面是解决这个问题的步骤：

1. 找到设备树中的sii9022节点和rgb节点，这两个节点分别对应ADV7393和视频输入。
2. 在sii9022节点中，找到clock-frequency属性，并将其值修改为27000000，以设置引脚输出时钟频率为27M。
3. 在rgb节点中，找到clock-frequency属性，并将其值修改为27000000，以设置引脚输出时钟频率为27M。

修改后的设备树内容如下：

#include <dt-bindings/display/media-bus-format.h>

&i2c2 {
    pinctrl-names = "default";
    pinctrl-0 = <&i2c2m0_xfer>;
    clock-frequency = <400000>;
    status = "okay";
 sii9022: sii9022@2a {
        compatible = "rockchip,adv7393";
        reg = <0x2a>;
        // pinctrl-names = "default";
        // pinctrl-0 = <&bt656_pins>;
        bus-format = <MEDIA_BUS_FMT_UYVY8_2X8>;
        #clock-cells = <0>;

        clocks = <&cru ACLK_VOP>, <&cru DCLK_VOP>, <&cru HCLK_VOP>;
        clock-names = "aclk_vop", "dclk_vop", "hclk_vop";

        clock-frequency = <27000000>;
        clock-output-names = "adv_27M";
        ports {
            #address-cells = <1>;
            #size-cells = <0>;

            port@0 {
                reg = <0>;
 sii9022_in_rgb: endpoint {
                    remote-endpoint = <&rgb_out_sii9022>;
                };
            };
        };
    };
};


&rgb {
    status = "okay";
    pinctrl-names = "default";
    pinctrl-0 = <&bt656_pins>;

    #clock-cells = <0>;

    clocks = <&cru ACLK_VOP>, <&cru DCLK_VOP>, <&cru HCLK_VOP>;
    clock-names = "aclk_vop", "dclk_vop", "hclk_vop";

    clock-frequency = <27000000>;
    clock-output-names = "adv_27M";


    ports {
        port@1 {
            reg = <1>;
            #address-cells = <1>;
            #size-cells = <0>;
 rgb_out_sii9022: endpoint@0 {
                reg = <0>;
                remote-endpoint = <&sii9022_in_rgb>;
            };
        };
    };
};

&rgb_in_vop {
    status = "okay";
};

&vop {
    status = "okay";
};

请确认修改后的设备树是否可以正确加载，并且检查时钟频率是否已经修改为27M。

如果以上方法没有解决你的问题，你可以尝试以下可能的解决方案：

1. 检查物理连接：确保ADV7393芯片与你的RV实际进行了正确的物理连接。
2. 检查驱动程序：确保你使用的驱动程序正确地支持修改引脚输出时钟频率，或者你可以尝试修改驱动程序以适应你的需求。
3. 检查硬件限制：查看RV和ADV7393芯片的硬件文档，确保它们支持修改引脚输出时钟频率。有时硬件限制可能会限制你所能做的修改。

希望这些方法能帮助你解决问题。如果问题仍然存在，请提供更多信息以便我们能够更好地帮助你解决问题。