看到inetl CPU对Lock前缀的处理，在intel手册中是这么描述的：
For the Intel486 and Pentium processors, the LOCK# signal is always asserted on the bus during a LOCK operation, even if the area of memory being locked is cached in the processor.
For the P6 and more recent processor families, if the area of memory being locked during a LOCK operation is cached in the processor that is performing the LOCK operation as write-back memory and is completely contained in a cache line, the processor may not assert the LOCK# signal on the bus. Instead, it will modify the memory location internally and allow it’s cache coherency mechanism to ensure that the operation is carried out atomically. This operation is called “cache locking. “ The cache coherency mechanism automatically prevents two or more processors that have cached the same area of memory from simultaneously modifying data in that area.
第二段的第三行， it will modify the memory location internally，这个怎么理解？
这个memory location是cache line吗?
怎么modify?modify成什么样？
modify后是什么流程（触发write-back到主存，通过snoop来保证cache herency?）?
