SE14.用pll产生的时钟，经过内部模块后，最后通过OBUFDS差分输出，一直报这个错误，不知道啥情况
Place:1136 - This design contains a global buffer instance,
<instance_clk0/clkout2_buf>, driving the net, <clk_108M>, that is driving the
following (first 30) non-clock load pins.
< PIN: inst_Parallel_to_serial/o_clk_108M_rstpot.A5; >
This is not a recommended design practice in Spartan-6 due to limitations in
the global routing that may cause excessive delay, skew or unroutable
situations. It is recommended to only use a BUFG resource to drive clock
loads. If you wish to override this recommendation, you may use the
CLOCK_DEDICATED_ROUTE constraint (given below) in the .ucf file to demote
this message to a WARNING and allow your design to continue.
< PIN "instance_clk0/clkout2_buf.O" CLOCK_DEDICATED_ROUTE = FALSE; >
