weixin_45813731
weixin_45813731
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2019-12-09 18:21 阅读 658

verilog用状态机实现循环彩灯控制器(含清零功能)

用状态机实现循环彩灯控制器(含清零功能)000→001→010→100→010→001→000→111→000→111→(循环)

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2条回答 默认 最新

  • zhaoyang_yt zhaoyang_yt 2019-12-11 14:45

    module led
    (
    input clk,
    input rst_n,

    output led_000,
    output led_001,
    output led_010,
    output led_100,
    output led_111
    );

    parameter LED_000 = 5'b00001,
    LED_001 = 5'b00010,
    LED_010 = 5'b00100,
    LED_100 = 5'b01000,
    LED_111 = 5'b00010;

    reg [4:0] cnt;
    reg [4:0] cur_state;
    reg [4:0] nxt_state;

    always @(posedge clk or negedge rst_n)
    begin
    if(~rst_n)
    cur_state <= LED_000;
    else
    cur_state <= nxt_state;
    end

    always @(*)
    begin
    nxt_state = cur_state;
    case(cur_state)
    LED_000 : if(cnt==5'h1f)
    nxt_state = LED_001;
    LED_001 : if(cnt==5'h1f)
    nxt_state = LED_010;
    LED_010 : if(cnt==5'h1f)
    nxt_state = LED_100;
    LED_100 : if(cnt==5'h1f)
    nxt_state = LED_111;
    LED_111 : if(cnt==5'h1f)
    nxt_state = LED_000;
    endcase
    end

    always @(posedge clk or negedge rst_n)
    begin
    if(~rst_n)
    cnt <= 5'd0;
    else
    cnt <= cnt + 1'd1;
    end

    assign led_000=cur_state[0];
    assign led_001=cur_state[1];
    assign led_010=cur_state[2];
    assign led_100=cur_state[3];
    assign led_111=cur_state[4];

    endmodule

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  • dashicaineng 蔡能教授,网站特聘专家 2019-12-10 00:29

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